IGBT is an integrated full controllable driving power semiconductor device which is consisted of BJT (Bipolar Junction Transistor) and MOSFET (Metal-Oxide-Semiconductor-Field-Effect-Transistor). The IGBT possesses advantages of two aspects: high input impedance introduced by MOSFET and low drop voltage introduced by BJT. The IGBT, which has such characteristics as: a high working frequency, a simple control circuit, a high current density, and a low conducting voltage, is extensively applied to the power control field.
It is generally required to solve the following technical problems of IGBTs: first, under a high temperature, a leak current of the IGBT is slightly larger, or even continuously increases and cannot remain stable, when returning to a normal temperature, the breakdown voltage of which is reduced or even a short circuit emerges (i.e. the voltage withstanding reliability problem of the IGBT); for the second problem, in order to improve the performance of the IGBT as far as possible, it requires continuously decreasing the on-resistance of the IGBT. Taking a high voltage IGBT for example, the main factors influencing the forward conductive voltage drop Vce(on) are the JEFT (Junction Field Effect Transistor) region equivalent resistance RJ and the drift region equivalent resistance RD. Therefore, the main factor to be considered in designing a high power IGBT is to reduce the two resistances as far as possible.
For the first technical problems,
It is generally acknowledged that the problem is mainly caused by mobile charge in the interior of the device and also by externally introduced mobile charge. In a practical case, the mobile charge moves under external stress, and leads to a change of the stable original surface field, causing the withstanding voltage to be changed, or even causing the leak current to be increasing. In order to quantitative express the influence to the terminal surface field caused by the external charge, the influence factor is defined as:α=ΔQ/(ΔQ+Qf)  (1)
wherein ΔQ indicates the effective mobile charges, Qf indicates the surface charges of the substrate. α indicates that when the influence of the mobile charges is greater, the voltage withstanding reliability of the device is worse, vice versa.
The technical method to solve the problems mainly starts from two aspects, on one aspect, reducing the factors which introduce mobile charges in the chip manufacturing and package process as far as possible, such as adopting a special surface passivation technology or adopting a high reliability synthetic resin to perform a package process, to reduce an introduction of external charges and water vapor and so on, it possesses an notable progress to reduce the leak current of the device under a high temperature. However, the method requires a high level package technology and the technological cost is relatively high. On the other aspect, adopting a special designed structure to strengthen a shielding effect of the chip to the mobile charges, thereby improving an electric leakage performance of the device under a stress condition with a high temperature and a high voltage, such as adopting a SIPOS (Semi-Insulating Polycrystalline silicon) structure which connects an end of the semi-insulating thin-film resistance to the main wiring, another end connects the cut-off ring, under a high reversed biasing condition, opposite ends of the semi-insulating resistance will generate an electric field, the electric field can shield an influence to the terminal surface electric field caused by the mobile charges, thereby improving a breakdown performance of the device after a test under a high temperature and a high voltage condition. The semi-insulating thin-film is generally formed by performing an oxygen doping or a nitrogen doping to polycrystalline silicon, and the specific resistance is required to fall into a range of 107 to 1010. Therefore, when adopting the SIPOS structure, the technical process is complex, and the quality of the thin-film resistance requires an accuracy control according to a design. The structure adopts the semi-insulating resistance to directly bridge the high voltage and the ground which can generate a non-ignorable power consumption when under an normal operation condition. At the same time, the thin-film resistance has a relative high temperature coefficient, and there is a stability problem to a certain extent.
For the second technical problem:
In order to reduce the forward conductive voltage drop of the device, the prior art mainly starts from reducing JEFT region equivalent resistance RJ and the drift region equivalent resistance RD.
For JEFT region equivalent resistance RJ, there are three kinds of solutions at present: first, a concentration of the carriers on the JEFT region is increased, and the JEFT resistance is reduced, but the method requires adding technical processes and the effect thereof is not obvious; second, the channel gate is adopted to substitute the planar gate, and the JEFT region in the planar gate is removed, the method directly removes the JEFT resistance, and the current density of the device is effectively increased, and the method is extensively applied to the low voltage IGBT, but the manufacture process of the method is complex, and the morphology of channel gate and the technical control influence the reliability of the IGBT greatly, it is seldom applied to a high voltage IGBT; third, a carrier storage layer is additionally provided under the P-body region, to increase a concentration of the carriers and reduce a forward conductive voltage drop, but the method requires adding technical processes, and the effect thereof is not obvious; fourth, the JEFT resistance is reduced by virtue of increasing a size of the planar gate, but the method will reduce a current density and a breakdown voltage of the device, and it requires an optimization design.
For the drift region resistance RD, it is achieved mainly by reducing a thickness of the drift region. Up to now, there are mainly three kinds of structures: punch-through IGBT (PT-IGBT), non-punch though IGBT (NPT-IGBT), and field-stop IGBT (FS-IGBT). The main differences among the three structures are the different structures of the substrate PN junctions and the different thicknesses of the drift regions. Compared with the PT-IGBT and the NPT-IGBT, the FS-IGBT has the thinnest thickness, and the forward conductive voltage drop decreases obviously, and the structure is extensively applied to the IGBT product. However, as the continuous increase of the sizes of the semiconductor wafers, the cost of grinding equipments, process complexity and high debris rate severely limit continuous improvements of the performances of IGBT.
Therefore, it is necessary to provide an improved technical solution to solve such problems.